The behaviour of the leakage current, interstrip resistance and capacitance have been studied on silicon microstrip detectors during an annealing period equivalent to similar or equal to 10(8) min at room temperature, after 34 MeV proton irradiation. A comparison between samples of the same geometry built on < 1 0 0 > and < 1 1 1 > substrates with different resistivity has been carried out. The samples were irradiated at 4 different fluences up to 1 X 10(14) p/cm(2). After the irradiation the measurements were performed at room temperature and after heating the samples at 60degreesC, 80degreesC and 120degreesC to cover the complete annealing curve. The leakage current shows the same annealing behaviour typical of a simple diode. The interstrip resistance measured at full depletion voltage (V-dep) decreases in all structures, going down to few tens of MOmega at the highest fluence. It remains practically constant during the annealing period. The interstrip capacitance (at V-dep) varies during the annealing period with the same behaviour in both substrates and for all the fluence values: it decreases during the annealing at room temperature, reaching a minimum value, and increases after each heat treatment. Bistable defects seem to contribute to the interstrip capacitance variation. (C) 2004 Elsevier B.V. All rights reserved.
Study of the annealing effect on silicon microstrip detectors built on < 111 > and < 100 > substrates after 34 MeV proton irradiation
DE PALMA, Mauro
2004-01-01
Abstract
The behaviour of the leakage current, interstrip resistance and capacitance have been studied on silicon microstrip detectors during an annealing period equivalent to similar or equal to 10(8) min at room temperature, after 34 MeV proton irradiation. A comparison between samples of the same geometry built on < 1 0 0 > and < 1 1 1 > substrates with different resistivity has been carried out. The samples were irradiated at 4 different fluences up to 1 X 10(14) p/cm(2). After the irradiation the measurements were performed at room temperature and after heating the samples at 60degreesC, 80degreesC and 120degreesC to cover the complete annealing curve. The leakage current shows the same annealing behaviour typical of a simple diode. The interstrip resistance measured at full depletion voltage (V-dep) decreases in all structures, going down to few tens of MOmega at the highest fluence. It remains practically constant during the annealing period. The interstrip capacitance (at V-dep) varies during the annealing period with the same behaviour in both substrates and for all the fluence values: it decreases during the annealing at room temperature, reaching a minimum value, and increases after each heat treatment. Bistable defects seem to contribute to the interstrip capacitance variation. (C) 2004 Elsevier B.V. All rights reserved.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
